Mitsubishi Electronics Unveils New 3D-RAM5 — Industry’s First Silicon to Provide Kilobit Memory Bus for Unprecedented 3D Graphics Rendering

Mitsubishi Electronics Unveils New 3D-RAM5 — Industry’s First Silicon
to Provide Kilobit Memory Bus for Unprecedented 3D Graphics Rendering

FOR IMMEDIATE RELEASE
Mitsubishi
Electronics Unveils New 3D-RAM5 — Industry’s First Silicon to Provide
Kilobit Memory Bus for Unprecedented 3D Graphics Rendering

New Architecture Offers 40 Mbits of Graphics
Memory, Plus
Hardware Accelerator, Linked by a 1024-bit 9-Gbyte Per Second Bus

SUNNYVALE, Calif., July 26, 1999 — Mitsubishi
Electronics America’s Electronic Device Group today announced the 3D-RAM5
(M2V40092DWG) integrated frame buffer memory architecture, the industry’s
first silicon combining DRAM and logic with a 1024-bit internal bus for 3D
graphics. 3D-RAM5 is designed in Mitsubishi’s 0.25-µm HyperDRAM™ process technology and integrates four times the density
of the fourth-generation 3D-RAM (3D-RAM4) into a package that is only 3.2
percent larger. As result, 3D-RAM5 supports high-resolution, large-screen
displays with 75 percent fewer chips for high-end 3D graphics applications, such
as digital content creation — in its preferred 16:9 high-definition television
(HDTV) format — and mechanical computer aided design (MCAD).
Moving hardware acceleration for raster operations, blending, and stencil
modes from a separate graphics controller to the memory chip while at the same
time widening the memory bus to a full kilobit enables unprecedented 3D pixel
rendering speed while minimizing power consumption. Thanks to its memory bus
width and to a 14 percent increase in the chip’s clock rate, the bus delivers
a 9 Gbyte per second data rate. A typical application uses at least four pieces
of 3D-RAM5 per system, resulting in an unmatchable 36 Gbyte per second
minimum aggregate data bandwidth from the frame buffer DRAM.
“Mitsubishi’s revolutionary technique in 3D-RAM5 of putting four
3D-RAM4 chips into the space of one reduces by half the cost-per-bit of the
previous 3D-RAM generation,” said Steve Forman, product manager for
application-specific memories at Mitsubishi Electronics America. “By
dramatically lowering chip count, Mitsubishi has also sharply reduced the number
of I/O pins that load the rendering controller as well as the required board
size. As a result, customers benefit from sharply reduced power, heat, and noise
in the 3D graphics accelerator subsystem.”
The 3D-RAM5 architecture allows each M2V40092DWG chip to incorporate 40 Mbits
of embedded DRAM in four interleaved banks (accessed via a 1024-bit wide memory
bus), plus a dedicated hardware accelerator and an SRAM pixel buffer. The new
chips support all of the blending and stencil modes for industry-standard
application programming interfaces (APIs) such as OpenGL® specification 1.2 and
its optional imaging extensions, and Microsoft’s DirectX® 7.0.

3D-RAM Architectural Details

The 3D-RAM5 architecture provides four banks of synchronous DRAM, 8 Kbits of
on-chip triple-ported SRAM cache, and an on-chip arithmetic logic unit (ALU).
The fully OpenGL compliant ALU eliminates the need for read-modify-write (RMW)
operations between the rendering controller and the frame buffer. The result is
a true “write-only” interface for all the blending, depth check,
stencil (as described in the OpenGL specification), and 256 raster operations
for Microsoft Windows® 95 and 98 device-independent bitmapped display drivers.
Integrating DRAM and logic together on the same die, the original 3D-RAM was
one of the first products to incorporate Mitsubishi’s acclaimed eRAM™
technology.
Eight major global customers are now using the original 3D-RAM technology in
their products, including Sun Microsystems, IBM, Real3D, and Evans &
Sutherland. Several PC OEMs have chosen this technology for their personal
workstation family of products, including Compaq, Hewlett-Packard, Siemens, and
Gateway.

Packaging and Availability

The 3D-RAM5 (M2V40092DWG) is available in a 256-pin plastic ball grid array (PBGA)
package that occupies a 17-mm x 17-mm footprint, and is functionally and
electrically backward compatible to previous 3D-RAM generations. Samples are now
available, with volume production scheduled to begin in the fourth quarter of
1999.
# # #

About Mitsubishi Electric and Mitsubishi Electronics America
Mitsubishi Electric
Corporation pioneered the integration of DRAM, SRAM and logic on the same piece
of silicon with its successful 3D-RAM and Cache DRAM (CDRAM) advanced graphics
memory architectures and is the only company to successfully integrate memory
— especially DRAM — processor and other core logic functions in the same
piece of silicon with its highly acclaimed eRAMÔ technology.
Mitsubishi markets its graphics memories and 3D graphics products in North
America through the Electronic Device Group of Mitsubishi Electronics America
Inc.
Mitsubishi Electric Corporation and its North American affiliate, Mitsubishi
Electronics America Inc., are world-class suppliers of semiconductors and
electronic products for computers, communications, industrial, Internet-enabled,
automotive, and visual applications. Mitsubishi combines its systems-level
expertise and high-level silicon process technologies to provide chip, chipset
and system-on-chip solutions. The company is ranked among the top-tier worldwide
semiconductor suppliers and offers an extensive range of semiconductor and
computer system components for the North American marketplace, including
embedded DRAM/flash/SRAM, ASIC, ASSP, MCU, discrete memory, graphics, microwave/RF,
optoelectronic, storage, and flat-panel display products.
Additional information on the
Mitsubishi Electric Semiconductor Group is available at http://www.mitsubishichips.com/.

Trademark Information
eRAM and HyperDRAM are trademarks of Mitsubishi
Electronics America Inc. DirectX and Windows are registered trademarks of
Microsoft Corporation. OpenGL is a registered trademark of Silicon Graphics,
Inc.

KEYWORDS
3D-RAM, embedded DRAM, synchronous DRAM, SDRAM, eRAM, HyperDRAM, wide data bus,
DRAM, frame buffer memory, application specific memory, graphics accelerator
memory, frame buffer, 3D graphics, 3D, graphics.

Editorial Contacts:
Mitsubishi Electronics America Inc.
John Garner
(408) 774-3191
garner_john@edg.mea.com
KVO Public Relations 
Don Tuite

(650) 919-2030
don_tuite@kvo.com
back to the Press Room


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