Mitsubishi Semiconductor Site – What is M32R/D?

Product Information
System Integration (eRAM)
ASICs
Application Specific Standard Products
– CMOS Imaging Sensors
– Sound Processor ICs
– Standard Linear ICs
Digital TV
Memory
– DRAM
– Flash
– 3D Graphics and AS Memory
– PC Cards
– SRAM
Microcontrollers
– 4-bit MCUs
– 8-bit MCUs
– 16-bit 7700 Family MCUs
– 16-bit M16C Family MCUs
– 32-bit MCUs
– One Time PROM
Microwave and RF
– GaAs Devices
– Microwave Integrated Circuits
– Surface Acoustic Wave Filters
– Si RF Modules
Optoelectronics
Power Devices
TFT-LCD Modules

ChipConnect
Internet Enabled

Flash Devices

USB

4-bit

8-bit

16-bit

7700 Family

M16C

32-bit

Application Notes

Data Sheets

Mask ROM Con- firmation Forms

Tools

Block Diagrams

What is the M32R/D?

World’s first 32-bit RISC microprocessor with large on-chip DRAM
Internal 128-bit bus eliminates memory bandwidth bottleneck in conventional systems
Achieves high performance while consuming less power
Suitable for portable Internet access devices

The Development
Concept:
a CPU with High Capacity Memory on One Chip.
Multimedia Portable Systems require the development of high-performance/low-power
consumption MCUs.
In this application area strict conditions of high performance(>20
MIPS) and low power consumption along with cost performance must be met. In conventional
MCU’s the principle limitation is that peripherals are integrated but that memory is
external which leads to a bus transaction bottleneck and increased power dissipation where
high-speed operation is required.
In view of this, Mitsubishi Electric has developed the world’s first DRAM
embedded 32-bit MCU. This MCU has very high performance, low power dissipation and
excellent cost performance meeting the requirements outlined above.
The inspiration of Super Integration of a CPU with high capacity memory
resulted in a 1 Gbyte per second CPU memory transaction rate and 6x performance** and 1/3
power dissipation**.
Furthermore, a 32-bit x 16-bit multiply with 56-bit accumulate operation
executable in a single cycle creates DSP functionality on-chip. This enables various
multimedia operations such as voice and image data compression/decompression, etc.
**as compared with
Mitsubishi’s current products.

New Concept for Multimedia
Applications? “On Chip DRAM”
A conventional Micro-controller system normally integrates a CPU and peripherals on one
chip with a large capacity external memory. However, using that method the external bus
system connecting the CPU and memory is typically 32-bit wide operating at 33MHz. As the
majority of CPU transactions in a typical implementation are data transactions such a
system is memory bandwidth limited and overall performance is restricted even though the
CPU itself is capable of producing much better results.

On the other hand, the M32R/D integrates a large capacity memory on chip whereas the
peripheral functions, which vary by application, are external. In this case, the
connection between CPU and memory are made by a high bandwidth internal bus 128-bits wide
running at 66.6MHz enabling the system to utilize the CPU’s true high-performance
capabilities. In this way, without using an expensive and complex memory control circuit,
this micro-controller resolves the so called “Von-Neuman Bottleneck” and ushers
in a new era in high-performance embedded systems design for multimedia applications.

Significant Reduction in
Cache Memory Line Replacement Time
The M32R/D has a wide 128-bit, and fast, 66.6MHz, bus between CPU, cache memory and DRAM,
achieving transfer rates of 128-bits per 15ns cycle. In this way, cache line memory
replacement time is significantly reduced.

For example: when a cache miss occurs, previously it took 16 cycles to fill one line
(240ns), however, with the M32R/D it takes just 5 cycles. Using this performance
application, software such as graphic operations and JPEG image processing can be
implemented two to six times faster than in the case of the conventional system.

128-bit Buffer/External
Bus/Interface Unit(BIU) Enables
High-speed Data Transfer
The M32R/D series external bus interface has a 128-bit buffer and supports burst transfer
mode of up to eight 16-bit half-words. This mode is used to speed up the transfer of
instructions from external memory.

Furthermore, the BIU supports DMA accesses to internal DRAM by an external bus master.
In this case the data transfer to the external system goes through the BIU buffer reducing
internal bus occupancy by the external DMA controller.

A conventional Microcontroller system consists of a CPU and Peripheral Circuits in one
chip with external connected memory. This configuration limits performance.

By integrating the CPU with 8 M bits of DRAM in one chip, a 128-bit internal bus between
processor and memory can be implemented. This leads to increased processing speed at lower
power consumption. Additionally, more flexible application becomes possible.

Mitsubishi Semiconductor Site – What is M32R/D?

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